This is a work in progress and likely to be updated.

The HP67 Arithmetic, Control and Timing chip (ACT) is a Mostek MK6216N. It understands most of the instructions but the HP67 card reader chip (CRC, a Mostek MK6250N) adds instructions and two more data registers:

Extra Instructions

Default Functions Flag. (ie if no program loaded. A-E do 1/x etc.)
CRC 1000 = Set.
CRC 1100 = Test. If flag s[3]=1. Clear flag.

Write mode (data or prog)
CRC 660 = Set.
CRC 760 = Clear.

Merge Flag
CRC 1200 = Set.
CRC 1300 = Test. If flag s[3]=1. Clear flag.

“a key was pressed” flag.
CRC 400 = Set.
CRC 500 = Test. If flag s[3]=1. Clear flag.

“waiting for side 2” flag.
CRC 1400 = Set.
CRC 1500 = Test. If flag s[3]=1. Clear flag.

???display_digits???
CRC 60 = Set.
CRC 160 = Test. If flag s[3]=1. Clear flag.

CRC 300 = Test W/PRGM switch. If … s[3]=1.

CRC 560 = Test card inserted. If … s[3]=1.

CRC 100 = Test ready. If ready s[3]= 1. Clear card inserted.

CRC 360 = Motor off.

CRC 260 = Motor on.

CRC 1700 = RW (read/write 7 nibbles fm/to card)

Extra RAM addresses

0x99 Write data (to go to card) – only the lhs (7 nibbles get written).
0x9b Read data (from card) – same 7 nibbles appear in lhs and rhs eg 12345671234567.

Microcode

Write

13211 if 1 = s 3 
13212 then go to 013406
13213 return 
13154 a exchange c[w] 	; a is chksum (left 7 nibbles) and n (15..0) from ram[base+n]
13155 c - 1 -> c[p] 	; n=n-1
13156 if n/c go to 013125
13125 c -> addr 
13126 b exchange c[w] 
13127 data -> c 	; get ram[base+n]
13130 0 -> a[w] 
13131 p <- 6 
13132 c -> a[wp] 	; put rhs in a, lhs stays in c
13133 rotate a left 	; move rhs, left 7 nibbles
13134 rotate a left 
13135 rotate a left 
13136 rotate a left 
13137 rotate a left 
13140 rotate a left 
13141 rotate a left 
13142 0 -> c[wp] 
13143 a exchange b[w] 	; save in b for later
13144 a + b -> a[w]	; update chksum 
13145 a + c -> a[w] 	; update chksum
13146 jsb 013162	; select ram[0x99]
13162 p <- 1 
13163 load constant 9 
13164 load constant 9 
13165 c -> addr 
13166 return 
13147 c -> data 	; write c to ram[0x99]
13150 jsb 013201	; wait for crc to be ready
13201 0 -> s 3 
13202 CRC 100 
13203 if 0 = s 3 
13204 then go to 013202
13205 binary 
13206 p <- 0 
13207 0 -> s 3 
13210 CRC 1700 		; write data to card
13211 if 1 = s 3 
13212 then go to 013406	; probably error writing
13213 return 

13151 b exchange c[w] 	; write what was in b (ram[..].rhs << 7)
13152 c -> data 
13153 jsb 013201	; wait for crc to be ready
13201 0 -> s 3 
13202 CRC 100 
13203 if 0 = s 3 
13204 then go to 013202
13205 binary 
13206 p <- 0 
13207 0 -> s 3 
13210 CRC 1700 		; write
13211 if 1 = s 3 
13212 then go to 013406
13213 return 

Read

12650: b exchange c[w]
12651: jsb 012644                    ; select ram bank 3 (addr=48)
12652: b -> c[w]
12653: c -> data register 15
12654: a -> b[w]
12655: data register -> c 12
12656: a exchange c[w]
12657: data register -> c 11
12660: if 0 = s 8
12661: then go to 012670
12662: if a >= c[m]
12663: then go to 012670
;
; update counters but don't save anything (g MERGE)
12664: c - 1 -> c[m]
12665: c -> data register 11
12666: data register -> c 15
12667: if n/c go to 012677
;
; update counters and save b in ram[ram[48+15]]
12670: c - 1 -> c[m]
12671: c -> data register 11
12672: data register -> c 15
12673: c -> addr
12674: b exchange c[w]
12675: c -> data                   ; save ram[i]= lhs.rhs
12676: b exchange c[w]
;
; finish up
12677: p <- 3
12700: return

Ask for Card

13614: if 1 = s 13          
13615: then go to 013657      
13616: 0 -> b[w]            
13617: p <- 13              
13620: load constant 11     ; 'C'
13621: load constant 10     ; 'r'
13622: load constant 13     ; 'd'
13623: 0 -> c[wp]           ; set rest to 0xffffff...
13624: c -> a[w]            
13625: a - 1 -> a[wp]       
13626: display toggle       ; show "Crd   "
13627: 0 -> s 3             
;
; clear key press
13630: 0 -> s 15            
13631: if 1 = s 15          
13632: then go to 013630      
;
; wait for card inserted or key press
13633: if 1 = s 15          
13634: then go to 013641    ; key pressed      
13635: CRC 560              ; if card inserted s 3 = 1                  
13636: if 0 = s 3           
13637: then go to 013633      
13640: return               ; card inserted

Card Format

For

46: 00000000000e37
47: 12131e153919fa

and W/PRGM

*** CardWrite  0: 0000000	; sync x 3
*** CardWrite  1: 0000000
*** CardWrite  2: 0000000
*** CardWrite  3: 3100222	; status
*** CardWrite  4: 12131e1	ram[47] lhs
*** CardWrite  5: 53919fa	ram[47] rhs
*** CardWrite  6: 0000000	ram[46] lhs
*** CardWrite  7: 0000e37	ram[46] rhs
*** CardWrite  8: 0000000
*** CardWrite  9: 0000000
*** CardWrite 10: 0000000
*** CardWrite 11: 0000000
*** CardWrite 12: 0000000
*** CardWrite 13: 0000000
*** CardWrite 14: 0000000
*** CardWrite 15: 0000000
*** CardWrite 16: 0000000
*** CardWrite 17: 0000000
*** CardWrite 18: 0000000
*** CardWrite 19: 0000000
*** CardWrite 20: 0000000
*** CardWrite 21: 0000000
*** CardWrite 22: 0000000
*** CardWrite 23: 0000000
*** CardWrite 24: 0000000
*** CardWrite 25: 0000000
*** CardWrite 26: 0000000
*** CardWrite 27: 0000000
*** CardWrite 28: 0000000
*** CardWrite 29: 0000000
*** CardWrite 30: 0000000
*** CardWrite 31: 0000000
*** CardWrite 32: 0000000
*** CardWrite 33: 0000000
*** CardWrite 34: 0000000
*** CardWrite 35: 0000000
*** CardWrite 36: 96a5c34	; chksum x2
*** CardWrite 37: 96a5c34

Status

c6 c5 c4 c3 c2 c1c0

c6= 1 Data, 2 Data#2 (sec).
3 Prog (001-112), 4 Prog Side 2 (steps 113-224).
There are 7 steps per register, 16 registers per side, =112 steps).

c5= 1 if single side, 0 if either part of 2 sided card.

c4= (F0?8:0)+(F1?4:0)+(F2?2:0)+(F3?1:0)

c3= 0 DEG, 1 RAD, 2 GRAD

c2= dsp (eg 3 for DSP 3, 2 for DSP 2)

c1c0= 22 FIX, 40 ENG, 00 SCI

More Detail

I have created commented / summarized listings for:
writing a HP-67 program to a mag card
reading a HP-67 program from a mag card